Kushal Kshirsagar

Power electronics engineer · Power delivery for AI and data-center processors

I design the circuits and packages that deliver hundreds to thousands of amperes to a processor with less loss and in less space. At Infineon (2019–2023) I worked on the power stages and power modules in its data-center AI power portfolio. I now work on power management in Apple's Silicon Engineering Group.

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Below is what I worked on, grouped by area, with a public source for each statement. Every claim is tagged by the kind of source behind it, so you can check it yourself.

Power stagesThe chip that switches the current, built to shed heat upward. Power modulesInductors and power stages built into one module. Control (TLVR)Regulators that respond faster to load steps. ArchitectureStacking processor loads to cut the current itself. Where it is usedProducts and companies, with public sources. VerifyEvery source in one table, with how to check it.

Impact in numbers

Recent record

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How to read the source tags

Patent record an issued patent or published application you can open on Google Patents. Company document a datasheet, press release or product page published by the company. Independent a third party (trade press, another company, a conference). My role a statement about what I did that the public record alone does not prove.

Power stages

The power stage is the chip that switches the current into a processor. In a conventional board its heat leaves through the board. A chip-embedded power stage with a floating shielding pad can instead pass heat up into an inductor and a heat sink.

What I worked on

My roleI worked on the definition of the TDA22590, Infineon's first chip-embedded power stage, and later proposed adding a floating shielding pad so heat could flow into the inductor of a co-packaged power module.

Public record

How to check this

Open the TDA22590 product page and datasheet, and confirm it is an integrated power stage in a chip-embedded package (PG-UFLGA-34-1).
Open the patent record for US 12,431,367 and read the abstract and Figure 1 for the floating shielding pad.
Compare the pad in the patent figure with the package drawing on the Infineon package page.
For use in Intel's Gaudi accelerators, open the module photographs in the linked IEEE Spectrum and CNBC articles and look for the power stages around the processor.

Draft note: confirm the exact sentence on how the Gaudi boards are tied to the TDA22590 before publishing. The public photographs show the boards; identifying the part on them needs a close look.

Power modules

A power module puts two power stages, their inductors and decoupling capacitors on one substrate, with each inductor stacked on top of its power stage. This saves board area and lets the module sit beneath the processor.

What I worked on

My roleI developed the inductor assemblies and the connection to the power stage used in Infineon's TDM data-center power modules, and am a named inventor on the patents below.

Patents

Products built this way

Independent coverage and use

How to check this

Open the Infineon exploded view from the APEC 2025 demonstration page. It labels each layer of the module.
Open US 12,738,406 and US 2023/0369256 and compare their figures with that exploded view: inductor over power stage on one substrate.
Open the TDM22544D and TDM22545D datasheets for the module specifications.
For use by a customer, open the Infineon and d-Matrix announcements and read what they say about the Corsair card.

Control: trans-inductor voltage regulators (TLVR)

A TLVR couples the output inductors of a multiphase regulator so the regulator answers fast load changes better. The architecture itself was invented by others; my work was on how such a regulator is controlled.

What I worked on

My roleI am a named inventor on US 11,876,445, which describes control of a trans-inductance multi-phase converter.

Public record

How to check this

Open US 2022/0109368 (issued as US 11,876,445) and confirm the inventor list and the subject: trans-inductance multi-phase converters.
On the same page, open the "Cited by" list. It shows later filings from other companies that cite the application.
Open the Analog Dialogue article and the Pulse Electronics article to see TLVR described as an industry architecture.

Draft note: add the TLVR modules that came later (TDM22545T and TDM24745T) once you decide whether to claim them under control or modules. They appear on the Power modules page.

Architecture: stacked power delivery

Loss in board copper grows with the square of the current. Stacking processor loads in series lets the main regulator deliver a fraction of the current at a multiple of the voltage, so the current itself comes down.

What I worked on

My roleI was first author and presenter of an industry-session presentation at IEEE APEC 2021 showing four stacked loads at 125 A and 3.6 V instead of 500 A at 0.9 V, and I am a named inventor on three stacking patents.

Public record

How to check this

Find the session on the APEC 2021 program. It is an industry-session presentation, not a paper in the proceedings.
Open the Analog Devices article, read its reference list, and confirm it cites the APEC 2021 presentation.
Open the three patent records and the "Cited by" lists to see later filings that cite them.

Draft note: add a link to the presentation itself only after Infineon and your co-authors agree to public posting.

Where this work is used

Each row below names a product or company and links to a public source. None of them is a statement from me.

How to check this

Open each source and look for the product name (TDM, TDA) or the company name.
Check the date on the source against the dates in the Verify table.
If a page has moved, search the title with the company name; the date and title are listed in the Verify table.

Talks and service

Talks

IEEE APEC 2021, industry session: Power Loss Reduction in Power Distribution Network Through Vertical Stacking

ConferenceFirst author and presenter, with D. Clavette, P. Kasturi and W. Huang. Virtual conference, June 14–17, 2021.

link to addProgram page or slides, once cleared for public posting. Related: Analog Devices article that cites it

Peer review

Reviewer for IEEE Transactions on Power Electronics, IEEE Open Journal of Power Electronics, IEEE Access and IEEE Power Electronics Magazine.

IndependentA. L. Paultre, From the Editor, IEEE Power Electronics Magazine, September 2026

Sep 2026 · link to addWeb of Science Researcher Profile (verified review record)

Draft note: add the review counts only if they match your Web of Science profile on the day you publish. Reviewer identities and manuscript numbers must stay off this site.

Curriculum vitae

Sources for every claim

Fremont, CA · [email protected] · LinkedIn · Google Scholar · Patents

Summary

Power electronics engineer and inventor working on delivering more than a thousand amperes to AI and data-center processors efficiently. Named inventor on 8 issued U.S. patents and 2 pending applications, in three areas: power modules for vertical power delivery, trans-inductor voltage regulator (TLVR) control, and series-stacked power delivery. First-named inventor on the inductor-assembly and co-packaging patents behind Infineon's TDM data-center power modules. First author and presenter at IEEE APEC 2021. Peer reviewer for four IEEE publications.

Experience

Silicon Validation Engineer, Apple Inc., Cupertino, CA Apr 2023 – present

Hardware DRI for power management unit (PMU) programs; owned development of the silicon-validation hardware on the critical path to qualifying new power silicon.
Led PMU hardware development for MacBook and iPad across silicon, firmware, validation and manufacturing teams.
Designed and validated PMU hardware in Cadence System Capture and Allegro, including power integrity analysis in PowerSI, SIWAVE and HFSS, and bench bring-up and failure analysis.

Sr. Staff Applications Engineer, Infineon Technologies, Warwick, RI and Milpitas, CA Apr 2019 – Apr 2023

Product Definition Engineer in Applications Engineering: led the definition and validation of power stages, then took on power modules. Promoted from Senior to Staff to Sr. Staff.

Power modules. Inventor of the inductor-assembly and co-packaging technology in Infineon's TDM dual-phase power modules (9×10×5 mm) for data-center and AI processors; first-named inventor on US 12,738,406, US 12,532,737 and US 2023/0369256.
Power stages. Co-inventor of the chip-embedded power stage with a floating shielding pad (US 12,431,367 and its continuation).
TLVR. Derived the transfer function of the trans-inductor voltage regulator and built and validated Infineon's first TLVR prototypes; co-inventor of US 11,876,445.
Stacked power delivery. Led Infineon's work on series-stacked power delivery; first author at IEEE APEC 2021 and inventor on three issued patents.
Best Team Player, Infineon Enterprise Power division (December 2022).

Power Electronics Engineer, Lucidity Lights Inc., Boston, MA Jul 2018 – Mar 2019

Developed a low-cost AC-DC flyback converter with power factor correction for dimmable induction lighting, from concept to production prototype; led FCC Part 18 EMC testing.

Graduate Research Assistant, University of Colorado Boulder Feb 2017 – May 2018

Researched ZVS series resonant converters using magnetostrictive piezoelectric composite devices for DARPA's MATRIX wireless power transfer program; reached 61% wireless power transfer efficiency.

Junior Project Engineer, Wavelet Technologies, Pune, India Aug 2014 – Jul 2016

Designed, simulated and prototyped analog circuits; hardware testing and rework on FPGA boards.

Patents

8 issued U.S. patents and 2 published applications. Each number links to its Google Patents record. Position is my place in the inventor list.

Patent	Title	Date	Position
Power modules and power stages
US 12,738,406	Inductor Connectivity and Assemblies	Issued Sep 15, 2026	1st of 5
US 12,532,737	Semiconductor Device Package Thermally Coupled to Passive Element	Issued Jan 20, 2026	1st of 7
US 12,575,023	Voltage Regulator Module Having a Power Stage	Issued Mar 10, 2026	2nd of 6
US 12,431,367	Embedded Package with Shielding Pad	Issued Sep 30, 2025	3rd of 5
US 2023/0369256	Multi-Device Power Module Arrangement	Published Nov 16, 2023 (pending)	1st of 5
US 2026/0018427	Embedded Package with Shielding Pad (continuation)	Published Jan 15, 2026 (pending)	3rd of 5
Trans-inductor voltage regulator control
US 11,876,445	Trans-Inductance Multi-Phase Power Converters and Control	Issued Jan 16, 2024	5th of 5
Series-connected dynamic loads
US 11,990,748	Power Supply System and Control in a Series Dynamic Load Configuration	Issued May 21, 2024	1st of 4
US 11,837,959	Power Supply System and Control in a Dynamic Load Configuration	Issued Dec 5, 2023	2nd of 4
US 11,462,988	Power Supply System and Current Control Based on Consumption by Dynamic Loads	Issued Oct 4, 2022	2nd of 4

Conference presentations

First author and presenter, IEEE APEC 2021 industry session: Power Loss Reduction in Power Distribution Network Through Vertical Stacking, with D. Clavette, P. Kasturi and W. Huang (Infineon). Virtual conference, June 14–17, 2021.

Peer review

Reviewer for IEEE Transactions on Power Electronics, IEEE Open Journal of Power Electronics, IEEE Access and IEEE Power Electronics Magazine (2026).

Education

M.S., Electrical Engineering (Power Electronics), University of Colorado Boulder, 2018. GPA 3.9/4.0.
B.E., Electronics and Telecommunication Engineering, University of Pune, India, 2014. First Class with Distinction.

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Verify: all sources

Every source used on this site, in one table.

Statement	Source	Type	Date

Links last checked: [DATE]. If a link no longer works, search the source title in the table.

About

I am a power electronics engineer. From 2019 to 2023 I worked at Infineon Technologies on product development for power stages and power modules for AI and data-center processors. I now work in Apple's Silicon Engineering Group on power management.

I have a master's degree from the University of Colorado Boulder (2018). I review manuscripts for IEEE Transactions on Power Electronics, IEEE Open Journal of Power Electronics, IEEE Access and IEEE Power Electronics Magazine.

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Contact and profiles

Email: [email protected]

Curriculum vitae (page, with a print-to-PDF button)

Google Scholar · LinkedIn · ORCID · Patents